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| DM81LS95A * DM81LS96A * DM81LS97A 3-STATE Octal Buffer September 1991 Revised May 1999 DM81LS95A * DM81LS96A * DM81LS97A 3-STATE Octal Buffer General Description These devices provide eight, two-input buffers in each package. All employ low-power-Schottky TTL technology. One of the two inputs to each buffer is used as a control line to gate the output into the high-impedance state, while the other input passes the data through the buffer. The DM81LS95A and DM81LS97A present true data at the outputs, while the DM81LS96A is inverting. On the DM81LS95A and DM81LS96A versions, all eight 3-STATE enable lines are common, with access through a 2-input NOR gate. On the DM81LS97A version, four buffers are enabled from one common line, and the other four buffers are enabled form another common line. In all cases the outputs are placed in the 3-STATE condition by applying a high logic level to the enable pins. Features s Typical power dissipation DM81LS95A, DM81LS97A DM81LS96A s Typical propagation delay DM81LS95A, DM81LS97A DM81LS96A 15 ns 10 ns 80 mW 65 mW s Low power-Schottky, 3-STATE technology Ordering Code: Order Number DM81LS95AWM DM81LS95AN DM81LS96AWM DM81LS96AN DM81LS97AN Package Number M20B N20A M20B N20A N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code. Connection Diagram Pin Descriptions DM81LS95A and DM92LS96A Pin Names A1-A8 Y1-Y8 G1-G2 Inputs Outputs Active LOW Output Enables (Note 1) Descriptions Note 1: Both G1 and G2 must be LOW for outputs to be enabled. DM81LS97A Pin Names A1-A8 Y1-Y8 G1 G2 Inputs Outputs Active LOW Output Enable (Y1-Y4) Active LOW Output Enable (Y5-Y8) Descriptions (c) 1999 Fairchild Semiconductor Corporation DS006435 www.fairchildsemi.com DM81LS95A * DM81LS96A * DM81LS97A Logic Symbols DM81LS95A Truth Tables DM81LS95A Inputs G1 H X L L G2 X H L L A X X H L Output Y Hi-Z Hi-Z H L DM81LS96A DM81LS96A Inputs G1 H X L L G2 X H L L A X X H L Output Y Hi-Z Hi-Z L H DM81LS97A DM81LS97A Inputs G1 H L L G2 H L L A1-A4 X H L A5-A6 X H L Output Y1-Y4 Hi-Z H L Y5-Y8 Hi-Z H L www.fairchildsemi.com 2 DM81LS95A * DM81LS96A * DM81LS97A Absolute Maximum Ratings(Note 2) Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range 7V 7V 0C to +70C -65C to +150C Note 2: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation. Recommended Operating Conditions Symbol VCC VIH VIL IOH IOL TA Supply Voltage HIGH Level Input Voltage LOW Level Input Voltage HIGH Level Output Current LOW Level Output Current Free Air Operating Temperature 0 Parameter Min 4.75 2 0.8 -5.2 24 70 Nom 5 Max 5.25 Units V V V mA mA C 3 www.fairchildsemi.com DM81LS95A * DM81LS96A * DM81LS97A DC Electrical Characteristics Symbol VI VOH VOL Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage DM81LS95A and DM81LS97A Conditions Min Typ (Note 3) Max -1.5 2.7 0.5 0.4 0.1 20 A (Note 4) A (Note 5) G -20 -50 -50 20 A A mA A Units V V over recommended operating free air temperature range (unless otherwise noted) VCC = Min, II = -18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max IOL = Max, VIH = Min IOL = 12 mA, VCC = Min V II IIH IIL Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current VCC = Max, VI = 7V VCC = Max, VI = 2.7V VCC = Max VI = 0.5V VI = 0.4V IOZH Off-State Output Current with HIGH Level Output Voltage Applied VCC = Max, VO = 2.4V VIH = Min, VIL = Max VCC = Max, VO = 0.4V VIH = Min, VIL = Max VCC = Max (Note 6) VCC = Max (Note 4) -20 A IOZL Off-State Output Current with LOW Level Output Voltage Applied IOS ICC Short Circuit Output Current Supply Current -20 16 -100 26 mA mA Note 3: All typicals are at VCC = 5V, TA = 25C. Note 4: Both G inputs are at 2V. Note 5: Both G inputs are at 0.4V. Note 6: Not more than one output should be shorted at a time, and the duration should not exceed one second. AC Electrical Characteristics VCC = 5V, TA = 25C Symbol Parameter DM81LS95A and DM81LS97A RL = 667 CL = 50 pF Min Max 16 28 25 30 20 27 CL = 150 pF Min Max 25 40 30 42 ns ns ns ns ns ns Units tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to HIGH Level Output Output Enable Time to LOW Level Output Output Disable Time from HIGH Level Output (Note 7) Output Disable Time from LOW Level Output (Note 7) Note 7: CL = 5 pF. www.fairchildsemi.com 4 DM81LS95A * DM81LS96A * DM81LS97A DC Electrical Characteristics Symbol VI VOH VOL Parameter Input Clamp Voltage HIGH Level Output Voltage LOW Level Output Voltage DM81LS96A Conditions Min Typ (Note 8) Max -1.5 2.7 0.5 0.4 0.1 20 A (Note 9) A (Note 10) G -20 -50 -50 20 A A mA A Units V V over recommended operating free air temperature range (unless otherwise noted) VCC = Min, II = -18 mA VCC = Min, IOH = Max VIL = Max, VIH = Min VCC = Min, IOL = Max IOL = Max, VIH = Min IOL = 12 mA, VCC = Min V II IIH IIL Input Current @ Max Input Voltage HIGH Level Input Current LOW Level Input Current VCC = Max, VI = 7V VCC = Max, VI = 2.7V VCC = Max VI = 0.5V VI = 0.4V VCC = Max, VO = 2.4V VIH = Min, VIL = Max VCC = Max, VO = 0.4V VIH = Min, VIL = Max VCC = Max (Note 11) VCC = Max (Note 10) IOZH Off-State Output Current with HIGH Level Output Voltage Applied IOZL Off-State Output Current with LOW Level Output Voltage Applied -20 A IOS ICC Short Circuit Output Current Supply Current -20 13 -100 21 mA mA Note 8: All typicals are at VCC = 5V, TA = 25C. Note 9: Both G inputs are at 2V. Note 10: Both G inputs are at 0.4V. Note 11: Not more than one output should be shorted at a time, and the duration should not exceed one second. AC Electrical Characteristics VCC = 5V, TA = 25C Symbol Parameter DM81LS96A RL = 667 CL = 50 pF Min Max 10 17 15 35 20 27 CL = 150 pF Min Max 16 30 30 45 ns ns ns ns ns ns Units tPLH tPHL tPZH tPZL tPHZ tPLZ Propagation Delay Time LOW-to-HIGH Level Output Propagation Delay Time HIGH-to-LOW Level Output Output Enable Time to HIGH Level Output Output Enable Time to LOW Level Output Output Disable Time from HIGH Level Output (Note 12) Output Disable Time from LOW Level Output (Note 12) Note 12: CL = 5 pF. 5 www.fairchildsemi.com DM81LS95A * DM81LS96A * DM81LS97A Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 6 DM81LS95A * DM81LS96A * DM81LS97A 3-STATE Octal Buffer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 7 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com |
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